Physical Design Engineer

Job Opening: Senior Physical Design Engineer

Experience: 10-15 Years

Employment Type: Full-Time (FTE)

Location: Bangalore, Hyderabad

Notice Period: Immediate to 30 Days

We are hiring an experienced Senior Physical Design Engineer with strong hands-on expertise across the complete Netlist-to-GDSII flow. The ideal candidate should have deep knowledge of advanced technology nodes (28nm and below) and extensive experience with industry-standard EDA tools.

Key Responsibilities

• End-to-end Netlist-to-GDSII implementation , including:
• Floorplanning
• Placement
• Clock Tree Synthesis (CTS)
• Routing
• Static Timing Analysis (STA)
• Power Integrity Analysis
• Physical Verification
• Hands-on experience with floorplanning and PR using Innovus / ICC2 / Fusion Compiler
• Perform timing closure and resolve setup/hold, SI, and power-related issues
• Work closely with STA and sign-off teams to achieve design closure

• Strong experience in Physical Design methodologies
• Hands-on experience with 28nm and lower technology nodes
• Proficiency in Tcl/Tk/Perl scripting
• Extensive experience with Synopsys and Cadence tools , including:
• Innovus
• ICC2
• PrimeTime (PT, PT-PX)
• Calibre
• Strong understanding of timing constraints, STA, and timing closure
• Experience in power, performance, and area (PPA) optimization

• Ability to work independently on complex blocks
• Strong debugging and analytical skills
• Good communication and cross-team collaboration skills

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