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Job Description
Location : 100% onsite in either Austin TX OR Sunnyvale, CA
Length: 6-month Contract-to-Hire :
Visa - There are no visa restrictions (H1s need a copy of I-797 showing MethodHub Software as the petitioner
Need to be local to either Austin or Sunnyvale, the final interview is onsite.
Mandatory Experience:
- 7 + years experience in architecting and implementing Design Verification infrastructure and executing the complete verification cycle
- Experience in the development of UVM based verification environments from scratch
- Experience with Design verification of Data-center applications like Video, AI/ML, and Networking designs
Minimum Qualifications
- B.S or M.S degree in Electrical Engineering, Computer Engineering or Computer Science
- Hands-on experience in Verilog, System Verilog, C/C++ based verification, and UVM methodology
- Experience in IP/sub-system and/or SoC level verification based on System Verilog UVM/OVM based methodologies
- Experience in EDA tools and scripting (Python, Perl, Shell) used to build tools and flows for verification environments.
Looking to get Placed? Try our Placement Guarantee Plan
Preferred Qualifications
- Experience with revision control systems like Mercurial(Hg), Git or SVN
Skills
CPythonIf an employer asks you to pay any kind of fee, please notify us immediately. Jobaaj does not charge any fee from the applicants and we do not allow other companies also to do so.
Important dates & deadlines?
Application Deadline
06 Jun 25, 07:27 PM IST
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