ATE Test Senior Engineer

Department Icon IT / Software Development & Related
102+ Applicants
Posted: 1 year ago
5-8 years
Bengaluru / Bangalore, Karnataka
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Posted: 1 year ago
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Applicants: 103+
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Job Description

ATE Test Engineer (Senior)

Location: Bangalore

Availability : Immediate Joinee - 1 month would be preferable

Functional Area: Post Silicon Validation on ATE

Job Title: Test Development Engineer Experience in Power Discrete, Power management, Mixed Signal, Analog and Digital device Test development on ATE

Description:

Engineer has to work with different teams for understanding the device datasheet and need to come with a detailed Test procedure/plan to test the chip in ATE environment. Need to interact with the PCB design team for developing the necessary hardware Test load board, bench board and probe cards. He/She should develop the complete ATE test program to validate the chip. Close interactions with the chip design and DFT teams are a must during the device debug phase and bring up and need to validate all the device parameters with the specification. In addition, Test engineer should involve in developing the test methodologies as required.

Preferred Tester (ATE) Platform: AccoTest, Teradyne ETS 800/364/88. Experience on any other tester platforms also welcomed

Responsibilities:

  • Work with design/DFT team to develop the detailed test procedure from device data sheet
  • Design and develop the required test hardware- Load board and Probe card
  • Develop the ATE test program for device debug for Power Discrete (IGBT/FET etc) PMIC, Analog and Mixed Signal devices.
  • First silicon verification and device bring up using ATE tools and bench equipment
  • Device characterization across temperature, voltage and process corners and validate the chip against the specification
  • Exposure on data analysis and reporting
  • Releasing the Final production quality test program to the customer both wafer final test program
  • Interactions with the Design/DFT team
  • Interact with the customer on a daily basis
  • Experience in test program releases at production test house

Experience:

  • BS/MS in Electronics Engineering or equivalent
  • 5-8 years of experience in semi-conductor testing and post silicon validation for Power Discrete ,Power management/Analog/Mixed Signal/ SoC devices.
  • Strong knowledge in ATE -AccoTest, Teradyne ETS 384/88/800 . Other ATE platforms also will be considered

Sound knowledge on PMIC, Analog, Mixed Signal and Digital test methodologies

  • Experience in developing the test program in ATE environment for Power Management, Analog, Mixed Signal and Digital devices
  • Extensive exposure on debug of PMIC, USB devices using ATE tools and bench equipment
  • Knowledge on device characterization and tester to tester correlation
  • Knowledge on ATE hardware design (Load board, probe cards), PCB design tools
  • Programming skill on C/C++
  • Exposure on Data power or Exensio tool is highly recommended
  • Knowledge on data extraction tool like Perl and python
  • Knowledge on DFT

Kindly share resume along with your preferred time to technical discussions.

Skills

HtmlCPythonTesting

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About Company

L&T Semiconductor Technologies Limited (LTSCT) is a fabless semiconductor company established in 2023 as a wholly owned subsidiary of Larsen & Toubro, launched with an initial investment of around USD 100 million.

LTSCT designs chips for automotive, industrial, energy and telecom applications, with an ambition to become the first global semiconductor company headquartered in India. It operates design centres across India, the United States, Europe and Japan.

Important dates & deadlines?

Application Deadline

13 May 25, 01:41 PM IST

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