Senior Design Verification Engineer

Company Description Neurealm is an AI-first engineering and modernization partner that helps global enterprises make measurable progress across Healthcare, Technology, Semiconductors, Commerce, Industrial, and Transportation sectors. Its NeuGAIN platform accelerates the enterprise AI journey, from data and software development to process improvement and IT operations. With end-to-end capabilities spanning AI, Edge AI, Perception AI, digital platform engineering, data, cybersecurity, technology operations, silicon engineering, and embedded services, Neurealm supports over 250 global enterprises. The company operates across India, the US, Canada, Germany, and Japan, combining strong technology partnerships and academic alliances. Guided by an engineering mindset and powered by Neurealm Labs, it turns ideas into practical solutions, frameworks, and accelerators that deliver real-world impact.

Role Description This is a full-time, on-site Senior Design Verification Engineer role based in Bengaluru. The individual in this role will own and drive verification plans for complex digital designs, collaborating closely with RTL and architecture teams to understand specifications and derive comprehensive test strategies. Daily responsibilities include building and maintaining testbenches, developing and executing functional and formal verification environments, creating robust test cases, and performing coverage analysis to ensure design quality. The role involves systematic debugging of design and verification issues, root-cause analysis, and clear documentation of findings and resolutions. The Senior Engineer will also mentor junior team members, contribute to methodology improvements, and align verification activities with Neurealms AI-first and silicon engineering initiatives.

Qualifications

• Strong expertise in Functional Verification and Debugging, with a proven ability to create verification plans, analyze coverage, and systematically resolve complex design issues.
• Solid knowledge of RTL Design and Computer Architecture, enabling effective collaboration with design teams and accurate interpretation of specifications and micro-architectural details.
• Hands-on experience with Formal Verification methodologies and tools, and the ability to integrate formal techniques into broader verification flows.
• Proficiency with industry-standard verification tools and languages (e.g., SystemVerilog, UVM, simulation and formal tools) and familiarity with modern verification methodologies.
• Bachelors or Masters degree in Electrical Engineering, Electronics, Computer Engineering, or a related field, with substantial experience in semiconductor or silicon engineering projects.
• Strong analytical and problem-solving skills, attention to detail, and the ability to work effectively in cross-functional engineering teams.
• Experience in AI, Edge computing, or high-performance SoC/ASIC design environments is an advantage.
• Excellent written and verbal communication skills and a track record of mentoring or leading technical initiatives is preferred.